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d a t a sh eet preliminary speci?cation supersedes data of august 1993 file under integrated circuits, ic01 1995 dec 19 integrated circuits tea6321 sound fader control circuit
1995 dec 19 2 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 features source selector for four stereo and one mono inputs interface for noise reduction circuits interface for external equalizer volume, balance and fader control special loudness characteristic automatically controlled in combination with volume setting bass control with equalizer filters treble control mute control at audio signal zero crossing fast mute control via i 2 c-bus fast mute control via pin i 2 c-bus control for all functions power supply with internal power-on reset. general description the sound fader control circuit tea6321 is an i 2 c-bus controlled stereo preamplifier for car radio hi-fi sound applications. quick reference data ordering information symbol parameter conditions min. typ. max. unit v cc supply voltage 7.5 8.5 9.5 v i cc supply current v cc = 8.5 v - 26 - ma v o(rms) maximum output voltage level v cc = 8.5 v; thd 0.1% - 2000 - mv g v voltage gain - 86 - +20 db g step(vol) step resolution (volume) - 1 - db g bass bass control - 18 - +18 db g treble treble control - 12 - +12 db g step(treble) step resolution (treble) - 1.5 - db (s+n)/n signal-plus-noise to noise ratio v o = 2.0 v; g v = 0 db; unweighted - 105 - db rr 100 ripple rejection v r(rms) < 200 mv; f = 100 hz; g v =0db - 75 - db a cs channel separation 250 hz f 10 khz; g v =0db 90 96 - db type number package name description version TEA6321T so32 plastic small outline package; 32 leads; body width 7.5 mm sot287-1
1995 dec 19 3 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 block diagram fig.1 block diagram. handbook, full pagewidth power supply source selector volume i +20 to - 31 db loudness left bass left 18 db treble left 12 db volume ii 0 to - 55 db balance fader front volume ii 0 to - 55 db balance fader rear mute function zero cross detector logic volume i +20 to - 31 db loudness right bass right 18 db treble right 12 db volume ii 0 to - 55 db balance fader rear volume ii 0 to - 55 db balance fader front i 2 c-bus receiver 21 31 2 19 16 15 11 14 22 20 18 17 13 100 m f v cc gnd 47 m f 9 x 220 nf c kin 23 25 24 26 27 c kvl 220 nf 8.2 nf 20 k w 150 nf 2.2 k w 3.4 k w 270 nf 270 nf 3.4 k w 270 nf 270 nf 28 5.6 nf tea6321 30 29 1 32 sda scl mute 3 4 10 8 9 7 6 512 c kvl 220 nf 8.2 nf 20 k w 2.2 k w 150 nf 5.6 nf 10 nf c m med838 v ref input right source input left source input mono source output right output left
1995 dec 19 4 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 pinning symbol pin description sda 1 serial data input/output gnd 2 ground outlr 3 output left rear outlf 4 output left front tl 5 treble control capacitor left channel or input from an external equalizer b2l 6 bass control left channel or output to an external equalizer b1l 7 bass control, left channel ivl 8 input volume i, left control part ill 9 input loudness, left control part qsl 10 output source selector, left channel idl 11 input d left source mute 12 mute control icl 13 input c left source imo 14 input mono source ibl 15 input b left source ial 16 input a left source iar 17 input a right source ibr 18 input b right source cap 19 electronic ?ltering for supply icr 20 input c right source v ref 21 reference voltage (0.5v cc ) idr 22 input d right source qsr 23 output source selector right channel ilr 24 input loudness right channel ivr 25 input volume i, right control part b1r 26 bass control right channel b2r 27 bass control right channel or output to an external equalizer tr 28 treble control capacitor right channel or input from an external equalizer outrf 29 output right front outrr 30 output right rear v cc 31 supply voltage scl 32 serial clock input fig.2 pin configuration. handbook, halfpage tea6321 med839 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 b1l b2l tl outlf outlr ial ibl imo icl idl mute qsl ill ivl icr idr v ref iar ibr cap qsr ilr ivr b1r b2r tr outrf outrr v cc scl gnd sda
1995 dec 19 5 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 functional description the source selector selects one of 4 stereo inputs or the mono input. the maximum input signal voltage is v i(rms) = 2 v. the outputs of the source selector and the inputs of the following volume control parts are available at pins 8 and 10 for the left channel and pins 23 and 25 for the right channel. this offers the possibility of interfacing a noise reduction system. the volume control function is split into two sections: volume i control block and volume ii control block. the control range of volume i is between +20 db and - 31 db in steps of 1 db. the volume ii control range is between 0 db and - 55 db in steps of 1 db. although the theoretical possible control range is 106 db (+20 to - 86 db), in practice a range of 86 db (+20 to - 66 db) is recommended. the gain/attenuation setting of the volume i control block is common for both channels. the volume i control block operates in combination with the loudness control. the filter is linear when the maximum gain for the volume i control (+20 db) is selected. the filter characteristic increases automatically over a range of 32 db down to a setting of - 12 db. that means the maximum filter characteristic is obtained at - 12 db setting of volume i. further reduction of the volume does not further influence the filter characteristic (see fig.5). the maximum selected filter characteristic is determined by external components. the proposed application gives a maximum boost of 17 db for bass and 4.5 db for treble. the loudness may be switched on or off via i 2 c-bus control (see table 7). the volume i control block is followed by the bass control block. an external filter for each channel in combination with internal resistors, provides the frequency response of the bass control (see fig.3). the adjustable range is between - 18 and +18 db in steps of 1.8 db at 46 hz. both loudness and bass control result in a maximum bass boost of 35 db for low volume settings. the treble control block offers a control range between - 12 and +12 db in steps of 1.5 db at 15 khz. the filter characteristic is determined by a single capacitor of 5.6 nf for each channel in combination with internal resistors (see fig.4). the basic step width of treble control is 3 db. the intermediate steps are obtained by switching 1.5 db boost and 1.5 db attenuation steps. the bass and treble control functions can be switched off via i 2 c-bus. in this event the internal signal flow is disconnected. the connections b2l and b2r are outputs and tl and tr are inputs for inserting an external equalizer. the last section of the circuit is the volume ii block. the balance and fader functions are performed using the same control blocks. this is realized by 4 independently controllable attenuators, one for each output. the control range of these attenuators is 55 db in steps of 1 db with an additional mute step. the circuit provides 3 mute modes: 1. zero crossing mode mute via i 2 c-bus using 2 independent zero crossing detectors (zcm, see tables 2 and 9 and fig.16). 2. fast mute via mute pin (see fig.10). 3. fast mute via i 2 c-bus either by general mute (gmu, see tables 2 and 9) or volume ii block setting (see table 4). the mute function is performed immediately if zcm is cleared (zcm = 0). if the bit is set (zcm = 1) the mute is activated after changing the gmu bit. the actual mute switching is delayed until the next zero crossing of the audio frequency signal. as the two audio channels (left and right) are independent, two comparators are built-in to control independent mute switches. to avoid a large delay of mute switching when very low frequencies are processed, the maximum delay time is limited to typically 100 ms by an integrated timing circuit and an external capacitor (c m = 10 nf, see fig.10). this timing circuit is triggered by reception of a new data word for the switch function which includes the gmu bit. after a discharge and charge period of an external capacitor the muting switch follows the gmu bit if no zero crossing was detected during that time. the mute function can also be controlled externally. if the mute pin is switched to ground all outputs are muted immediately (hardware mute). this mute request overwrites all mute controls via the i 2 c-bus for the time the pin is held low. the hardware mute position is not stored in the tea6321. for the turn on/off behaviour the following explanation is generally valid. to avoid af output caused by the input signal coming from preceding stages, which produces output during drop of v cc , the mute has to be set before the v cc will drop. this can be achieved by i 2 c-bus control or by grounding the mute pin. for use where is no mute in the application before turn off, a supply voltage drop of more than 1 v be will result in a mute during the voltage drop.
1995 dec 19 6 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 the power supply should include a v cc buffer capacitor, which provides a discharging time constant. if the input signal does not disappear after turn off the input will become audible after certain time. a 4.7 k w resistor discharges the v cc buffer capacitor, because the internal current of the ic does not discharge it completely. the hardware mute function is favourable for use in radio data system (rds) applications. the zero crossing mute avoids modulation plops. this feature is an advantage for mute during changing presets and/or sources (e.g. traffic announcement during cassette playback). limiting values in accordance with the absolute maximum rating system (iec 134). note 1. human body model: c = 100 pf; r = 1.5 k w ; v 3 2 kv. charge device model: c = 200 pf; r = 0 w ; v 3 500 v. symbol parameter conditions min. max. unit v cc supply voltage 0 10 v v n voltage at pins 1 and 3 to 32 to pin 2 0v cc v t amb operating ambient temperature - 40 +85 c t stg storage temperature - 65 +150 c v es electrostatic handling note 1
1995 dec 19 7 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 characteristics v cc = 8.5 v; r s = 600 w ; r l =10k w ; c l = 2.5 nf; ac coupled; f = 1 khz; t amb =25 c; gain control g v = 0 db; bass linear; treble linear; fader off; balance in mid position; loudness off; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit v cc supply voltage 7.5 8.5 9.5 v i cc supply current - 26 33 ma v dc internal dc voltage at inputs and outputs 3.83 4.25 4.68 v v ref internal reference voltage at pin 21 - 4.25 - v g v(max) maximum voltage gain r s =0 w ; r l = 19 20 21 db v o(rms) output voltage level for p max at the power output stage thd 0.1%; see fig.11 - 2000 - mv start of clipping thd = 1% 2300 -- mv r l =2k w ; c l = 10 nf; thd=1% 2000 -- mv v i(rms) input sensitivity v o = 2000 mv; g v =20db - 200 - mv f ro roll-off frequency c kin = 220 nf; c kvl = 220 nf; z i =z i(min) low frequency ( - 1 db) 60 -- hz low frequency ( - 3 db) 30 -- hz high frequency ( - 1 db) 20000 -- hz c kin = 470 nf; c kvl = 100 nf; z i =z i(typ) low frequency ( - 3 db) 17 -- hz a cs channel separation v i = 2 v; frequency range 250 hz to 10 khz 90 96 - db thd total harmonic distortion frequency range 20 hz to 12.5 khz v i = 100 mv; g v =20db - 0.1 - % v i = 1 v; g v =0db - 0.05 0.15 % v i = 2 v; g v =0db - 0.1 - % v i = 2 v; g v = - 10 db - 0.1 - % rr ripple rejection v r(rms) < 200 mv f = 100 hz 70 76 - db f = 40 hz to 12.5 khz - 66 - db (s+n)/n signal-plus-noise to noise ratio unweighted; 20 hz to 20 khz rms; v o = 2.0 v; see figs 6 and 7 - 105 - db ccir468-2 weighted; quasi peak; v o = 2.0 v g v =0db - 95 - db g v =12db - 88 - db g v =20db - 81 - db
1995 dec 19 8 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 p no(rms) noise output power (rms value) only contribution of tea6321; power ampli?er for 6 w mute position; note 1 -- 10 nw a ct crosstalk between bus inputs and signal outputs note 2 - 110 - db source selector z i input impedance 25 35 45 k w a s input isolation of one selected source to any other input f = 1 khz - 105 - db f = 12.5 khz - 95 - db v i(rms) maximum input voltage (rms value) thd < 0.5%; v cc = 8.5 v - 2.15 - v thd < 0.5%; v cc = 7.5 v - 1.8 - v v offset dc offset voltage at source selector output by selection of any inputs -- 10 mv z o output impedance - 80 120 w r l output load resistance 10 -- k w c l output load capacity 0 - 2500 pf g v voltage gain, source selector - 0 - db control part (source selector disconnected; source resistance 600 w ) z i input impedance volume input 100 150 200 k w input impedance loudness input 25 33 40 k w z o output impedance - 80 120 w r l output load resistance 2 -- k w c l output load capacity 0 - 10 nf r dcl dc load resistance at output to ground 4.7 -- k w v i(rms) maximum input voltage (rms value) thd < 0.5% - 2.15 - v v no noise output voltage ccir468-2 weighted; quasi peak g v =20db - 110 220 m v g v =0db - 33 50 m v g v = - 66 db - 13 22 m v mute position - 10 -m v cr tot total continuous control range - 106 - db recommended control range - 86 - db g step step resolution - 1 - db step error between any adjoining step -- 0.5 db symbol parameter conditions min. typ. max. unit 20 v bus p p C () v o rms () -------------------------- - log ? ? ??
1995 dec 19 9 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 d g a attenuator set error g v = +20 to - 50 db -- 2db g v = - 51 to - 66 db -- 3db d g t gain tracking error g v = +20 to - 50 db -- 2db mute att mute attenuation see fig.10 100 110 - db v offset dc step offset between any adjoining step g v =0to - 66 db - 0.2 10 mv g v =20to0db - 215mv dc step offset between any step to mute g v =0to - 66 db -- 10 mv volume i control and loudness cr vol continuous volume control range - 51 - db g v voltage gain - 31 - +20 db g step step resolution - 1 - db l bmax maximum loudness boost loudness on; referred to loudness off; boost is determined by external components f = 40 hz - 17 - db f = 10 khz - 4.5 - db bass control g bass bass control, maximum boost f = 46 hz 16 18 19 db maximum attenuation f = 46 hz 16 18 19 db g step step resolution (toggle switching) f = 46 hz - 1.8 - db step error between any adjoining step f = 46 hz -- 0.5 db v offset dc step offset in any bass position -- 20 mv treble control g treble treble control, maximum boost f = 15 khz 11 12 13 db maximum attenuation f = 15 khz 11 12 13 db maximum boost f > 15 khz -- 15 db g step step resolution (toggle switching) f = 15 khz - 1.5 - db step error between any adjoining step f = 15 khz -- 0.5 db v offset dc step offset in any treble position -- 10 mv volume ii, balance and fader control cr continuous attenuation fader and volume control range 53.5 55 56.5 db g step step resolution - 12db attenuation set error -- 1.5 db symbol parameter conditions min. typ. max. unit
1995 dec 19 10 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 notes to the characteristics 1. the indicated values for output power assume a 6 w power amplifier at 4 w with 20 db gain and a fixed attenuator of 12 db in front of it. signal-to-noise ratios exclude noise contribution of the power amplifier. 2. the transmission contains: total initialization with mad and subaddress for volume and 8 data words, see also definition of characteristics, clock frequency = 50 khz, repetition burst rate = 400 hz, maximum bus signal amplitude = 5 v (p-p). 3. the ac characteristics are in accordance with the i 2 c-bus specification. this specification, the i 2 c-bus and how to use it , can be ordered using the code 9398 393 40011. mute function (see fig.10) h ardware mute v sw mute switch level (2 v be ) - 1.45 - v mute active v swlow input level -- 1.0 v i i input current v swlow =1v - 300 --m a mute passive: level internally de?ned v swhigh saturation voltage -- v cc v t d(mute) delay until mute passive -- 0.5 ms z ero crossing mute i d discharge current 0.3 0.6 1.2 m a i ch charge current - 300 - 150 -m a v swdel delay switch level (3 v be ) - 2.2 - v t d delay time c m =10nf - 100 - ms v wind window for audio signal zero crossing detection - 30 40 mv muting at power supply drop v ccdrop supply drop for mute active - v 19 - 0.7 - v power-on reset (when reset is active the gmu-bit (general mute) is set and the i 2 c-bus receiver is in reset position) v cc increasing supply voltage start of reset -- 2.5 v end of reset 5.2 6.5 7.2 v decreasing supply voltage start of reset 4.2 5.5 6.2 v digital part (i 2 c-bus pins); note 3 v ih high level input voltage 3 - 9.5 v v il low level input voltage - 0.3 - +1.5 v i ih high level input current - 10 - +10 m a i il low level input current - 10 - +10 m a v ol low level output voltage i l =3ma -- 0.4 v symbol parameter conditions min. typ. max. unit
1995 dec 19 11 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 i 2 c-bus protocol i 2 c-bus format notes 1. s = start condition. 2. slave address (mad) = 1000 0000. 3. a = acknowledge, generated by the slave. 4. subaddress (sad), see table 1. 5. data, see table 1. 6. p = stop condition. table 1 second byte after mad. note 1. significant subaddress. s (1) slave address (2) a (3) subaddress (4) a (3) data (5) a (3) p (6) function bit msb lsb 765432 (1) 1 (1) 0 (1) volume/loudness v 00000000 fader front right ffr 00000001 fader front left ffl 00000010 fader rear right frr 00000011 fader rear left frl 00000100 bass ba 00000101 treble tr 00000110 switch s 00000111
1995 dec 19 12 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 2 de?nition of third byte after mad and sad notes 1. zero crossing mode. 2. switch loudness on/off. 3. volume control. 4. dont care bits (logic 1 during testing). 5. fader control front right. 6. fader control front left. 7. fader control rear right. 8. fader control rear left. 9. bass control. 10. treble control. 11. mute control for all outputs except the outputs ovl and ovr (general mute). 12. source selector control. function bit msb lsb 76543210 volume/loudness v zcm (1) loff (2) v5 (3) v4 (3) v3 (3) v2 (3) v1 (3) v0 (3) fader front right ffr x (4) x (4) ffr5 (5) ffr4 (5) ffr3 (5) ffr2 (5) ffr1 (5) ffr0 (5) fader front left ffl x (4) x (4) ffl5 (6) ffl4 (6) ffl3 (6) ffl2 (6) ffl1 (6) ffl0 (6) fader rear right frr x (4) x (4) frr5 (7) frr4 (7) frr3 (7) frr2 (7) frr1 (7) frr0 (7) fader rear left frl x (4) x (4) frl5 (8) frl4 (8) frl3 (8) frl2 (8) frl1 (8) frl0 (8) bass ba x (4) x (4) x (4) ba4 (9) ba3 (9) ba2 (9) ba1 (9) ba0 (9) treble tr x (4) x (4) x (4) tr4 (10) tr3 (10) tr2 (10) tr1 (10) tr0 (10) switch s gmu (11) x (4) x (4) x (4) x (4) sc2 (12) sc1 (12) sc0 (12)
1995 dec 19 13 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 3 volume i setting g v (db) data v5 v4 v3 v2 v1 v0 loudness on: the increment of the loudness characteristics is linear at every volume step in the range from +20 to - 11 db +20 111111 +19 111110 +18 111101 +17 111100 +16 111011 +15 111010 +14 111001 +13 111000 +12 110111 +11 110110 +10 110101 +9 110100 +8 110011 +7 110010 +6 110001 +5 110000 +4 101111 +3 101110 +2 101101 +1 101100 0 101011 - 1 101010 - 2 101001 - 3 101000 - 4 100111 - 5 100110 - 6 100101 - 7 100100 - 8 100011 - 9 100010 - 10 100001 - 11 100000
1995 dec 19 14 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 loudness characteristic is constant in a range from - 11 db to - 31 db - 12 011111 - 13 011110 - 14 011101 - 15 011100 - 16 011011 - 17 011010 - 18 011001 - 19 011000 - 20 010111 - 21 010110 - 22 010101 - 23 010100 - 24 010011 - 25 010010 - 26 010001 - 27 010000 - 28 001111 - 29 001110 - 30 001101 - 31 001100 repetition of steps in a range from - 28 db to - 31 db - 28 001011 - 29 001010 - 30 001001 - 31 001000 - 28 000111 - 29 000110 - 30 000101 - 31 000100 - 28 000011 - 29 000010 - 30 000001 - 31 000000 g v (db) data v5 v4 v3 v2 v1 v0
1995 dec 19 15 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 4 volume ii setting (fader and balance); note 1 g v (db) data frr5 frr4 frr3 frr2 frr1 frr0 frl5 frl4 frl3 frl2 frl1 frl0 ffl5 ffl4 ffl3 ffl2 ffl1 ffl0 ffr5 ffr4 ffr3 ffr2 ffr1 ffr0 0 111111 - 1 111110 - 2 111101 - 3 111100 - 4 111011 - 5 111010 - 6 111001 - 7 111000 - 8 110111 - 9 110110 - 10 110101 - 11 110100 - 12 110011 - 13 110010 - 14 110001 - 15 110000 - 16 101111 - 17 101110 - 18 101101 - 19 101100 - 20 101011 - 21 101010 - 22 101001 - 23 101000 - 24 100111 - 25 100110 - 26 100101 - 27 100100 - 28 100011 - 29 100010 - 30 100001 - 31 100000 - 32 011111 - 33 011110 - 34 011101
1995 dec 19 16 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 note 1. for a particular range the data is always the same, only the subaddress changes. - 35 011100 - 36 011011 - 37 011010 - 38 011001 - 39 011000 - 40 010111 - 41 010110 - 42 010101 - 43 010100 - 44 010011 - 45 010010 - 46 010001 - 47 010000 - 48 001111 - 49 001110 - 50 001101 - 51 001100 - 52 001011 - 53 001010 - 54 001001 - 55 001000 mute 0 0 0 1 1 1 mute 0 0 0 1 1 0 mute 0 0 0 1 0 1 mute 0 0 0 1 0 0 mute 0 0 0 0 1 1 mute 0 0 0 0 1 0 mute 0 0 0 0 0 1 mute 0 0 0 0 0 0 g v (db) data frr5 frr4 frr3 frr2 frr1 frr0 frl5 frl4 frl3 frl2 frl1 frl0 ffl5 ffl4 ffl3 ffl2 ffl1 ffl0 ffr5 ffr4 ffr3 ffr2 ffr1 ffr0
1995 dec 19 17 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 5 bass setting notes 1. recommended data word for step 0 db. 2. result of 1.8 db boost and 1.8 db attenuation. 3. the last four bass control data words mute the bass response. 4. the last bass control and treble control data words (00000) enable the external equalizer connection. g bass (db) data ba4 ba3 ba2 ba1 ba0 +18.0 11111 +16.2 11110 +18.0 11101 +16.2 11100 +18.0 11011 +16.2 11010 +14.4 11001 +12.6 11000 +10.8 10111 +9.0 10110 +7.2 10101 +5.4 10100 +3.6 10011 +1.8 10010 0 (1) 10001 0 (2) 10000 - 1.8 01111 - 3.6 01110 - 5.4 01101 - 7.2 01100 - 9.0 01011 - 10.8 01010 - 12.6 01001 - 14.4 01000 - 16.2 00111 - 18.0 00110 - 16.2 00101 - 18.0 00100 note 3 00011 note 3 00010 note 3 00001 notes 3 and 4 00000
1995 dec 19 18 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 6 treble setting notes 1. recommended data word for step 0 db. 2. result of 1.5 db boost and 1.5 db attenuation. 3. the last eight treble control data words select treble output. 4. the last treble control and bass control data words (00000) enable the external equalizer connection. g treble (db) data tr4 tr3 tr2 tr1 tr0 +12.0 11111 +10.5 11110 +12.0 11101 +10.5 11100 +12.0 11011 +10.5 11010 +12.0 11001 +10.5 11000 +9.0 10111 +7.5 10110 +6.0 10101 +4.5 10100 +3.0 10011 +1.5 10010 0 (1) 10001 0 (2) 10000 - 1.5 01111 - 3.0 01110 - 4.5 01101 - 6.0 01100 - 7.5 01011 - 9.0 01010 - 10.5 01001 - 12.0 01000 note 3 00111 note 3 00110 note 3 00101 note 3 00100 note 3 00011 note 3 00010 note 3 00001 notes 3 and 4 00000
1995 dec 19 19 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 table 7 loudness setting table 8 selected input note 1. x = dont care bits (logic 1 during testing). characteristic data loff with loudness 0 linear 1 function data sc2 sc1 sc0 stereo inputs ial and iar 1 1 1 stereo inputs ibl and ibr 1 1 0 stereo inputs icl and icr 1 0 1 stereo inputs idl and idr 1 0 0 mono input imo 0 x (1) x (1) table 9 mute mode function data gmu zcm direct mute off 0 0 mute off delayed until the next zero crossing 01 direct mute 1 0 mute delayed until the next zero crossing 11 fig.3 bass control. handbook, full pagewidth - 20 - 10 20 10 4 10 3 10 2 10 10 0 f (hz) g bass (db) med840
1995 dec 19 20 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.4 treble control. handbook, full pagewidth - 15 - 10 - 5 15 10 5 10 4 10 3 2 10 5 10 0 f (hz) g treble (db) med424 fig.5 volume control with loudness (including low roll-off frequency). handbook, full pagewidth 20 0 10 5 med425 10 4 10 3 10 2 10 - 10 - 20 - 30 - 40 10 f (hz) g v (db)
1995 dec 19 21 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.6 signal-to-noise ratio; noise weighted: ccir468-2, quasi peak. handbook, full pagewidth 50 100 1 10 10 - 1 10 - 2 10 - 3 10 - 4 med426 60 70 80 90 p o (w) s/n (db) (1) (2) (3) (1) v i = 2.0 v. (2) v i = 0.5 v. (3) v i = 0.2 v. fig.7 signal-to-noise ratio; v i = 2 v; p max =6w. handbook, full pagewidth 60 110 1 10 10 - 1 10 - 2 10 - 3 10 - 4 med427 70 80 90 100 p o (w) s/n (db) (1) (2) (3) (1) unweighted rms. (2) ccir468-2 rms. (3) ccir468-2 quasi peak.
1995 dec 19 22 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.8 noise output voltage; ccir468-2, quasi peak. handbook, full pagewidth 30 200 150 50 0 - 70 - 50 - 30 - 10 10 med428 100 gain (db) noise ( m v) (1) (2) stereo/mono inputs. (1) loudness on. (2) loudness off. fig.9 muting. handbook, full pagewidth - 60 - 80 - 100 - 120 - 140 med429 f (hz) (db) 10 2 10 3 2 x 10 3 5 x 10 3 10 4 2 x 10 4 50 20 500 200
1995 dec 19 23 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.10 mute function diagram. (1) typically 2.2 v; referenced to 3 v be handbook, full pagewidth med841 tea6321 i ch = - 150 m a i d = 0.6 m a c m = 10 nf hardware mute switch mute pin 12 2.2 1.45 0 - 150 0.5 ms delay until mute passive 100 ms t (ms) u (v) v cc 8.5 delay switch level mute switch level i ( m a) (1) zero crossing mute start end of delay hard mute on hard mute off
1995 dec 19 24 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 if the 20 db gain is not required for the maximum volume position, it will be an advantage to use the maximum boost gain and then increased attenuation in the last section, volume ii. therefore the loudness will be at the correct place and a lower noise and offset voltage will be achieved. fig.11 level diagram. handbook, halfpage v o = 2 v for p (max) power stage g = 20 db tea6321 p (max) = 100 w at 4 w v i(min) = 200 mv mbe910 handbook, halfpage v o = 1 v for p (max) power stage g = 26 db tea6321 p (max) = 100 w at 4 w v i(min) = 200 mv med842 a. gain volume i = 20 db (g v(max) ); gain volume ii = 0 db; fader and balance range = 55 db. b. gain volume i = 20 db (g v(max) ); gain volume ii = - 6 db global setting; fader and balance range now 49 db, previously 55 db. a. b.
1995 dec 19 25 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.12 turn-on/off power supply circuit diagram. handbook, full pagewidth 16 15 13 11 14 17 18 20 22 219 21 30 29 4 3 31 tea6321 + v cc 8.5 v 4.7 k w 9 220 nf 9 600 w inputs +8.5 v to oscilloscope outputs to oscilloscope 4 4.7 m f 4 10 k w v p 100 47 470 m f m f m f med843 fig.13 turn-on/off behaviour. handbook, full pagewidth 5 10 0 01234 med433 2 4 6 8 t (s) (v) (1) (2) (1) v cc . (2) v o .
1995 dec 19 26 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.14 test circuit for power supply ripple rejection (rr). handbook, full pagewidth tea6321 input a to d left and right and input mono output right output left front and rear 10 8 5 12 32 1 76 21 31 2 19 23 25 28 v p 10 k w 0.2 v (rms) 1000 m f 47 m f 0.1 m f v cc = 8.5 v 100 m f 600 w 220 nf 220 nf 5.6 nf scl sda 4.7 m f v o 5.6 nf 220 nf 10 nf med844 3.4 k w 270 nf 270 nf 3.4 k w 270 nf 270 nf 26 27 fig.15 test circuit for channel separation ( a cs ). handbook, full pagewidth med845 output left output right front and rear v p 47 m f 0.1 m f v cc = 8.5 v 100 m f 600 w 220 nf scl sda 4.7 m f v o 5.6 nf 220 nf v i 220 nf 470 m f input a to d right and left tea6321 input a to d left and right and input mono 10 8 5 12 32 1 21 31 2 19 23 25 28 220 nf 5.6 nf 10 nf 76 3.4 k w 270 nf 270 nf 3.4 k w 270 nf 270 nf 26 27
1995 dec 19 27 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 selection of input signals by using the zero crossing mute mode a selection from input a (ial) to input b (ibl) left sources produces a modulation click depending on the difference of the signal values at the time of switching. at t 1 the maximum possible difference between signals is 7 v(p-p) (see fig.16) and gives a large click. using the cross detector no modulation click is audible. for example: the selection is enabled at t 1 , the microcontroller sets the zero cross bit (zcm = 1) and then the mute bit (gmu = 1) via the i 2 c-bus. the output signal follows the input a signal, until the next zero crossing occurs and then activates mute. after a fixed delay time at t 2 , the microcontroller sends the bits for input switching and mute inactive. the output signal remains muted until the next signal zero crossing of input b (ibl) occurs, and then follows that signal. the delay time t 2 - t 1 is e.g. 40 ms. therefore the capacity c m = 3.3 nf. the zero cross function is working at the lowest frequency of 40 hz determined by the c m capacitor. fig.16 zero cross function; only one channel shown. handbook, full pagewidth v t t 1 4 0 - 1 - 2 - 3 - 4 1 2 3 t 2 med436 (1) (2) (3) (1) input a (ial). (2) output. (3) input b (ibl).
1995 dec 19 28 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 loudness ?lter calculation example figure 17 shows the basic loudness circuit with an external low-pass filter application. r1 allows an attenuation range of 21 db while the boost is determined by the gain stage v 2 . both result in a loudness control range of +20 to - 12 db. defining f ref as the frequency where the level does not change while switching loudness on/off. the external resistor r3 for f ref ? can be calculated as: . with g v = - 21 db and r1 = 33 k w , r3 = 3.2 k w is generated. for the low-pass filter characteristic the value of the external capacitor c1 can be determined by setting a specific boost for a defined frequency and referring the gain to g v at f ref as indicated above. for example: 3 db boost at f = 1 khz g v =g v(ref) + 3 db = - 18 db; f = 1 khz and c1 = 100 nf. if a loudness characteristic with additional high frequency boost is desired, an additional high-pass section has to be included in the external filter circuit as indicated in the block diagram. a filter configuration that provides ac coupling avoids offset voltage problems. figure 18 shows an example of the loudness circuit with bass and treble boost. the calculation of this network is numeric. r3 r1 10 g v 20 ------ - 110 g v 20 ------ - C --------------------- = 1 j w c1 () -------------------- - r1 r3 + () 10 g v 20 ------ - r3 C 110 g v 20 ------ - C ------------------------------------------------------------- - = fig.17 basic loudness circuit. handbook, halfpage med437 v 1 v 2 r1 r3 c1 c kvl r2 0 db 33 k w 8 9 fig.18 loudness circuit with bass and treble boost. h andbook, halfpage med846 v 1 v 2 r1 150 nf 20 k w 2.2 k w 8.2 nf 220 nf r2 0 db 33 k w 8 9
1995 dec 19 29 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 internal pin configurations values shown in figs 19 to 31 are typical dc values; v cc = 8.5 v. fig.19 pin 1: sda (i 2 c-bus data). 5 v 1.8 k w mbe911 1 fig.20 pins 3, 4, 29, 30: output signals. 4.25 v 80 w + mbe912 3 fig.21 pins 5 and 28: treble control capacitors. 4.25 v 2.4 k w + + mbe913 5 fig.22 pins 6 and 27: bass control capacitor outputs. mbe914 + 4.25 v 80 w 6
1995 dec 19 30 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.23 pins 7 and 26: bass control capacitor inputs. mbe915 7 3.52 k w 4.25 v + fig.24 pins 8 and 25: input volume 1, control part. med847 8 4.25 v + 150 k w 4.25 v fig.25 pins 9 and 24: input loudness, control part. mbe905 9 4.25 v 1.12 k w + fig.26 pins 10 and 23: output source selector. mbe906 + 4.25 v 80 w 10
1995 dec 19 31 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 fig.27 pins 11, 13 to 18, 20, 22: inputs. mbe907 + 4.25 v 35 k w 4.25 v 11 fig.28 pin 12: mute control. mbe908 + 8.5 v constant 2.2 v 1.3 k w 4.5 k w maximum 200 m a 0.6 m a constant 12 fig.29 pin 19: filtering for supply; pin 21: reference voltage. med439 19 21 + + 4.7 k w 300 w 8.5 v 5 k w 4.25 v 3.4 k w 3.4 k w fig.30 pin 31: supply voltage. mbe909 31 apply +8.5 v to this pin fig.31 pin 32: scl (i 2 c-bus clock). med440 32 5 v 1.8 k w
1995 dec 19 32 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.10 0.25 0.01 1.4 0.055 0.3 0.1 2.45 2.25 0.49 0.36 0.27 0.18 20.7 20.3 7.6 7.4 1.27 10.65 10.00 1.2 1.0 0.95 0.55 8 0 o o 0.25 0.1 0.004 0.25 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot287-1 (1) 0.012 0.004 0.096 0.086 0.02 0.01 0.050 0.047 0.039 0.419 0.394 0.30 0.29 0.81 0.80 0.011 0.007 0.037 0.022 0.01 0.01 0.043 0.016 w m b p d h e z e c v m a x a y 32 17 16 1 q a a 1 a 2 l p q detail x l (a ) 3 e pin 1 index 0 5 10 mm scale so32: plastic small outline package; 32 leads; body width 7.5 mm sot287-1 95-01-25 97-05-22
1995 dec 19 33 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1995 dec 19 34 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
1995 dec 19 35 philips semiconductors preliminary speci?cation sound fader control circuit tea6321 notes
philips semiconductors C a worldwide company argentina: ierod, av. juramento 1992 - 14.b, (1428) buenos aires, tel. (541)786 7633, fax. (541)786 9367 australia: 34 waterloo road, north ryde, nsw 2113, tel. (02)805 4455, fax. (02)805 4466 austria: triester str. 64, a-1101 wien, p.o. box 213, tel. (01)60 101-1236, fax. (01)60 101-1211 belgium: postbus 90050, 5600 pb eindhoven, the netherlands, tel. (31)40-2783749, fax. (31)40-2788399 brazil: rua do rocio 220 - 5 th floor, suite 51, cep: 04552-903-s?o paulo-sp, brazil, p.o. box 7383 (01064-970), tel. (011)821-2333, fax. (011)829-1849 canada: philips semiconductors/components: tel. (800) 234-7381, fax. (708) 296-8556 chile: av. santa maria 0760, santiago, tel. (02)773 816, fax. (02)777 6730 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. (852)2319 7888, fax. (852)2319 7700 colombia: iprelenso ltda, carrera 21 no. 56-17, 77621 bogota, tel. (571)249 7624/(571)217 4609, fax. (571)217 4549 denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. (45)32 88 26 36, fax. (45)31 57 19 49 finland: sinikalliontie 3, fin-02630 espoo, tel. (358)0-615 800, fax. (358)0-61580 920 france: 4 rue du port-aux-vins, bp317, 92156 suresnes cedex, tel. (01)4099 6161, fax. (01)4099 6427 germany: p.o. box 10 51 40, 20035 hamburg, tel. (040)23 53 60, fax. (040)23 53 63 00 greece: no. 15, 25th march street, gr 17778 tavros, tel. (01)4894 339/4894 911, fax. (01)4814 240 india: philips india ltd, shivsagar estate, a block, dr. annie besant rd. worli, bombay 400 018 tel. (022)4938 541, fax. (022)4938 722 indonesia: philips house, jalan h.r. rasuna said kav. 3-4, p.o. box 4252, jakarta 12950, tel. (021)5201 122, fax. (021)5205 189 ireland: newstead, clonskeagh, dublin 14, tel. (01)7640 000, fax. (01)7640 200 italy: philips semiconductors s.r.l., piazza iv novembre 3, 20124 milano, tel. (0039)2 6752 2531, fax. (0039)2 6752 2557 japan: philips bldg 13-37, kohnan 2 -chome, minato-ku, tokyo 108, tel. (03)3740 5130, fax. (03)3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. (02)709-1412, fax. (02)709-1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. (03)750 5214, fax. (03)757 4880 mexico: 5900 gateway east, suite 200, el paso, tx 79905, tel. 9-5(800)234-7381, fax. (708)296-8556 netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. (040)2783749, fax. (040)2788399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. (09)849-4160, fax. (09)849-7811 norway: box 1, manglerud 0612, oslo, tel. (022)74 8000, fax. (022)74 8341 pakistan: philips electrical industries of pakistan ltd., exchange bldg. st-2/a, block 9, kda scheme 5, clifton, karachi 75600, tel. (021)587 4641-49, fax. (021)577035/5874546 philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. (63) 2 816 6380, fax. (63) 2 817 3474 portugal: philips portuguesa, s.a., rua dr. antnio loureiro borges 5, arquiparque - miraflores, apartado 300, 2795 linda-a-velha, tel. (01)4163160/4163333, fax. (01)4163174/4163366 singapore: lorong 1, toa payoh, singapore 1231, tel. (65)350 2000, fax. (65)251 6500 south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430, johannesburg 2000, tel. (011)470-5911, fax. (011)470-5494 spain: balmes 22, 08007 barcelona, tel. (03)301 6312, fax. (03)301 42 43 sweden: kottbygatan 7, akalla. s-164 85 stockholm, tel. (0)8-632 2000, fax. (0)8-632 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. (01)488 2211, fax. (01)481 77 30 taiwan: philips taiwan ltd., 23-30f, 66, chung hsiao west road, sec. 1. taipeh, taiwan roc, p.o. box 22978, taipei 100, tel. (886) 2 382 4443, fax. (886) 2 382 4444 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, thailand, tel. (66) 2 745-4090, fax. (66) 2 398-0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. (0 212)279 27 70, fax. (0212)282 67 07 ukraine: philips ukraine, 2a akademika koroleva str., office 165, 252148 kiev, tel. 380-44-4760297, fax. 380-44-4766991 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. (0181)730-5000, fax. (0181)754-8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. (800)234-7381, fax. (708)296-8556 uruguay: coronel mora 433, montevideo, tel. (02)70-4044, fax. (02)92 0601 internet: http://www.semiconductors.philips.com/ps/ for all other countries apply to: philips semiconductors, international marketing and sales, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, telex 35000 phtcnl, fax. +31-40-2724825 scds47 ? philips electronics n.v. 1995 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. printed in the netherlands 513061/1100/02/pp36 date of release: 1995 dec 19 document order number: 9397 750 00534

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